1. Field of the Invention
This invention relates to electronic circuits used as voltage regulators and more specifically to circuits and methods used to stabilize a voltage regulator.
2. Description of the Relevant Art
The problem addressed by this invention is encountered in voltage regulation circuits. Voltage regulators are inherently medium to high gain circuits, typically greater than 50 db, with low bandwidth. With this high gain and low bandwidth, stability is often achieved by setting a dominate pole set with the load capacitor. Achieving stability over a wide range of load currents with a low value load capacitor (.about.0.1 uF) is difficult because the load pole formed by the load capacitor and load resistor can vary by more than three decades of frequency and be as high as tens of KHz requiring the circuit to have a very broad bandwidth of greater than 3 MHz which is incompatible with the power process used for voltage regulators.
FIG. 1 shows a prior art solution to the stabilization problem. The voltage regulator 2 in FIG. 1 converts an unregulated Vdd voltage, 12 volts in this example, into a regulated voltage Vreg, 5 volts in this example. Amplifier 6, resistor 10, and capacitor 12 are configured as an integrator thereby providing a zero to cancel the pole of the load (load pole). The integrator drives pass transistor 8. Resistors 14 and 16 form a voltage divider circuit which is used to scale the output voltage such that the output voltage can be fed back to the inverting input of an error amplifier 4. Resistor 18 and capacitor 20 are not part of voltage regulator 2 but rather are the schematic representation of the typical load on the voltage regulator circuit.
In this prior art example, the pole associated with the pull down resistors and load can be calculated as: ##EQU1## where R.sub.L =resistance of the load=R14 and R16 in parallel with R18. C.sub.L =the capacitance of C20 which is typically around 0.1 microfarad.
Therefore, the pole associated with the prior art circuit is load dependent and can vary from 16 Hz to 32 KHz for an R14+R16 equal to 100 kilo-ohms and R18 ranging from 50 ohms to 1 mega-ohm. The wide variation of the pole frequency is difficult to stabilize, as will be appreciated by persons skilled in the art. A prior art solution to this problem is to change the pull down resistors R14+R16 from 500 kilo-ohms to around 500 ohms which changes the pole frequency to a range of 3.2 KHz to 32 KHz, which is a frequency spread of 1 decade instead of 3 decades. However, the power dissipated by the pull down resistor R18 increases, as shown below: EQU power=(12v-5v)(I.sub.load +I.sub.pulldown)=(7v)(100 mA)+(7v)(10 mA)
Therefore, the 500 ohm resistor adds 70 milli-watts of power dissipation in the chip which is approximately a 10% increase in power dissipation for the added stability.